I'd like to second that, for some reasons:
a) other machines like RS/6000 etc borrowed the RR/RX/RS instruction set from
the S/370, and they are RISC in my opinion
b) I know other machines (old German mainframes) which are definitely CISC, and
they have stack instructions or they are able to modify other instructions by
combining them with stack instructions and replacing the address part of the
instructions by register references and all such things - that is really
complicated - compared to that, the S/370 instruction set is very simple. You
can do very much with only one instruction of the TR 440 mainframe ... increment
a register, store into a memory location ... all in one combined instruction,
which you can compose of two simple instructions etc.
c) think of the pipelining efforts the modern z processors do - that's RISC - up
to ten instructions executing in parallel
As T. said: the complex instructions like EDMK only count for a very small
percentage in the executed instructions summary.
The mainframe, in fact, is both: a very fast RISC processor, and a decimal
machine, doing commercial workload at a reasonable speed.
Am 17.02.2013 01:17, schrieb T.H.:
> On 15 February 2013 21:33, R.V. wrote:
>> The S/360 is clearly definitely and unequivocably a CISC machine.
>> Think of instructions like ED, EDMK, TR, TRT, PACK, UNPK, CVB, CVD,
>> and of course all the decimal arithmetic instructions, all the
>> character move and compare instructions (except the immediate
>> instructions). Then there are the shift instructions, whose times
>> depend on the number of positions to be shifted; the
>> floating-point instructions, which pre- and/or post-normalize
>> (except for Halve); multiply and divide instructions. Then for the
>> S/370, instructions like MVCL and CLCL were added.
> One might better think of the mix of instruction encountered in a
> real world instruction stream. ED and EDMK form a minuscule fraction
> of all instructions executed, and even in a commercial environment,
> the packed decimal instructions (including CVB, CVD, PACK, and UNPK)
> form a very small portion. Indeed only the RR and RX instructions
> (and their modern counterparts) show up on any sort of ordinary
> graph of instruction use, and all others can go in the "other"
> Certainly S/360 and S/370 are CISC machines from a time long
> predating the terms RISC and CISC. But for practical purposes (such
> as compiler writing or performance analysis) rather than academic
> taxonomy, they may as well be RISC.